Dr. Máire McLoone  Royal Academy of Engineering/EPSRC Research Fellow

Dr. Máire McLoone MEng, PhD, MIEE, MIEEE
Institute of Electronics, Communications
and Information Technology (ECIT),
Queens University Belfast,
Northern Ireland Science Park,
Queen’s Road, Queen’s Island,
Belfast, Northern Ireland.
Tel:  +44 (0)28 90971785
Fax: +44 (0)28 90971702
Email: m.mcloone@ecit.qub.ac.uk
Research Interests - CRYPTOGRAPHY RESEARCH GROUP  - Generic silicon architectures for private key algorithms  - Generic silicon architectures for public key algorithms  - Wireless and Ad Hoc Network Security Protocols & Architectures  - Generic Microprocessor Architectures for Cryptography  - Hardware/software architectures of Key-exchange protocols - Elliptic Curve Cryptosystems (ECCs) in terms of both algorithmic and architectural aspects - Crytanalytical techniques with a particular view to studying algorithmic robustness versus implementation complexity
Teaching Interests - Level 2: Circuits & Systems
Recent Publications Book: · M. McLoone, J.V. McCanny System-on-Chip Architectures and Implementations for Private-Key Data Encryption Kluwer Academic/Plenum Publishers, ISBN 0-306-47882-X, 2003. Book Chapter: · M. McLoone, J.V. McCanny Performance Analysis of SHACAL-1 Encryption Hardware Architectures Chapter in ‘New Algorithms, Architectures and Applications for Reconfigurable Computing’, Editors, W. Rosenstiel, P. Lysaght, Kluwer Academic, December 2004. Journal: · McLoone, M Hardware Performance Analysis of the SHACAL-2 Encryption Algorithm; IEE Proceedings – Circuits, Devices and Systems, accepted Feburary 2005. · McIvor, C., McLoone, M., McCanny, J.V. Modified Montgomery Modular Multiplication and RSA Exponentiation Techniques IEE Proceedings – Computers & Digital Techniques, Vol. 151, No. 6, pp 402-408, Nov 2004 · McIvor, C., McLoone, M., McCanny, J.V. Improved Montgomery Modular Inverse Algorithm IEE Electronics Letters, Vol. 40, No. 18, September 2004, pp 1110-1111, ISSN 0013-5194 · McLoone, M., McCanny, J.V. Generic Architecture and Semiconductor IP cores for AES Cryptography IEE Proceedings – Computers & Digital Techniques, Vol. 150, No. 4, July 2003. · McLoone, M., McCanny, J.V. Rijndael FPGA Implementations Utilizing Look-Up Tables Journal of VLSI Signal Processing Systems, KAP, vol. 34-3, pp 261-275, July 2003. · McLoone, M., McCanny, J.V. A High Performance FPGA Implementation of DES Using a Novel Method for Implementing the Key Schedule IEE Proceedings – Circuits, Devices and Systems, Vol. 150, No. 5, October 2003. Conference Publications (2004-2005): · Sezer, S, McLoone M., McCanny, J.V; Reconfigurable Architectures for Network Processing, Invited Paper, IEEE VLSI-TSA International Symposium on VLSI Design, Automation, and Test (VLSI-TSA-DAT), Taiwan, April 2005. · Smyth, N., McLoone M., McCanny, J.V; Reconfigurable Cryptographic RISC Microprocessor; IEEE VLSI-TSA International Symposium on VLSI Design, Automation, and Test (VLSI-TSA-DAT), Taiwan, April 2005. · McLoone, M., Mc Ivor, C., McCanny, J.V.; Coarsely Integrated Operand Scanning (CIOS) Architecture for High-Speed Montgomery Modular Multiplication; IEEE International Conference on Field-Programmable Technology (FPT), pp 185-192, Brisbane, December 2004. · McLoone, M., Mc Ivor, C., McCanny, J.V.; Montgomery Modular Multiplication Architecture for Public Key Cryptosystems; IEEE Workshop on Signal Processing Systems (SiPS) Design & Implementation, pp. 349-354, Texas, October 2004. · Smyth, N., McLoone M., McCanny, J.V.; Reconfigurable Hardware Acceleration of WLAN Security; IEEE Workshop on Signal Processing Systems (SiPS) Design & Implementation, pp 194-199, Texas, October 2004. · McIvor C., McLoone, M., McCanny, J.V. Fast Montgomery Modular Multiplication Architectures Suitable for ECCS Over GF(p) ISCAS 2004, May 2004 · Mc Ivor, C., McLoone M., McCanny, J.V; FPGA Montgomery Multiplier Architectures – A Comparison; IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM); California, April 2004.

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