Introduction

Research Activities

Nanotechnology

System On Chip

Microelectromechanical Systems (MEMS)

Integrated Circuits and Electronic Devices

Silicon On Insulator (SOI)

Metallisation

Materials and Technology

Microelectronic Device Simulations

Research Opportunities

Research Contacts

Laboratory & Facilities

NISRC Members Only

Forum

1. Low YH, Bain MF, Bien DCS, Mitchell SJN and Gamble HS, "Fabrication of self-aligned sub-100 nm iron wires by selective chemical vapor deposition", Electrochemical and Solid-State Letters, 9 no.12, pp G340-G342, Dec 2006. Also published in Virtual Journal of Nanoscale Science & Technology Oct 2006.

2. Low YH, Bain MF, Bien DCS, Montgomery JH, Armstrong BM and Gamble HS, "Selective deposition of CVD iron on silicon dioxide and tungsten", Microelectronic Engineering, v 83 no.11-12, pp 2229-2233, Nov/Dec 2006.

3. Hu W, Ismail MY, Cahill R, Gamble HS, Dickie R, Fusco V, Linton D, Rea SP and Grant N, "Tunable liquid crystal reflectarray patch element", Electronics Letters, v 42, n 9, p 509-511, April 2006.

4. Alam MS and Armstrong GA, "Accurate substrate modelling of RF CMOS", International Journal of Numerical Modelling, Vol. 19, May/June 2006, pp. 257-269.

5. Alam MS and Armstrong GA, "Non-linear modelling of HBT using artificial neural network", Journal of Active and Passive Electronic Devices, June 2006.

6. Kranti A and Armstrong GA, "Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs : Analytical model and design considerations", Solid-State Electronics, Vol. 50, No. 3, March 2006, pp. 437-447.

7. Kranti A and Armstrong GA, "Performance assessment of nanoscale double- and triple-gate FinFETs", Semiconductor Science and Technology, Vol. 21, No. 4, April 2006, pp. 409-421.

8. Lim TC and Armstrong GA, "The impact of the intrinsic and extrinsic resistances of double gate SOI on RF performance", Solid-State Electronics, Vol. 50, No. 5, May 2006, pp. 774-783.

9. Armstrong BM, "Micro and Nano Fabrication" Invited Speaker, European Doctoral School on Metamaterials Lille May 2006

10. Alam MS, Lim TC and Armstrong GA, "Analogue performance of double gate SOI transinstors", International Journal of Electronics, Vol. 93, No. 1, January 2006, pp. 1-18.

11. Alam MS and Armstrong GA, "Design and noise optimisation CMOS LNA and RF communication", Proc. of National Conf. on Comunication, Delhi India, January 2006.

12. Baine P T, Bain M, McNeill D W, Gamble HS and Armstrong BM, "Low temperature bonding Of PECVD silicon dioxide layers", 210th Electrochemical Society Meeting, Semiconductor Wafer Bonding : Science, Technology and Application, Mexico, Oct/Nov 2006, v 3, issue 6.

13. Ding J, Linton D, Armstrong BM, Mitchell SJN and Fusco VF, "Multiphysics simulation of electromagnetic shielding and thermal stressing within ceramic and silicon multilayer packages for RF applications" Electronics System Integration Technology Conference ESTC2006, Dresden, Sept 2006.

14. Hurley RE, Wadsworth H and Gamble HS, "Surface blistering of low temperature annealed hydrogen and helium co-implanted silicon and its application to splitting of bonded wafer substrates", ION 2006, the VI-th Int Conf on Ion Implantation and Other Applications of Ions and Electrons Kazimierz-Dolny, Poland, June 2006.

15. Kranti A and Armstrong GA, "Compact model for short channel effects in source/drain engineered nanoscale double gate (DG) SOI MOSFETs", 2006 Workshop on Compact Modeling - NSTI Nanotech 2006, pp. 820-823. Boston 2006.

16. Kranti A and Armstrong GA, "Optimal design of source/drain extension (SDE) regions in multiple gate MOSFETs¡± In Proc. Seventh European Workshop on Ultimate Integration of Silicon - ULIS 2006, pp. 137-140, Grenoble 2006.

17. Kranti A and Armstrong GA, "On the feasibility of nanoscale FinFETs for RF Applications¡±, Silicon Nanoelectronics Workshop, Hawaii 2006.

18. Kranti A and Armstrong GA, "Modelling short channel effects in source/drain extension region engineered double gate MOSFETs", Second Workshop on the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, EUROSOI 2006, Grenoble France, 8-10 March, 2006.

19. Lim TC, Kranti A and Armstrong GA, "Performance assessment of nanoscale multiple gate MOSFETs (MuGFETs) for RF applications", European Microwave Integrated Circuits Conference (EuMIC), Manchester, Sept 2006.

20. Lim TC and Armstrong GA, "DGSOI - from the operational amplifier perspective", Second Workshop on the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, EUROSOI 2006, Grenoble France, 8-10 March, 2006.

21. Low YH, Bien DCS,  Montgomery JH and Gamble HS, "Characterisation and surface and analysis of chemical vapour deposition cobalt-iron", Microscience 2006, London UK, 27-29 June, 2006.

22. Low YH, Montgomery JH and Gamble HS, "Characterisation of high temperature CVD iron", 209th Electro-Chemical Society (ECS) Meeting, Denver Colorado, 7-12 May, 2006.

23. Low YH, Bain MF, Bien DCS,  Montgomery JH, Armstrong BM and Gamble HS, "Selective depostion of CVD iron on SiO₂ and tungsten", Materials for Advanced Metallization (MAM 2006), Grenoble France, 6-8 March, 2006.

24. Mitchell SJN, "Non-CMOS applications for SOI", Invited Short-Course Lecture, Second Workshop on the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, EUROSOI 2006, Grenoble France, 8-10 March, 2006.

25. Suder S, Gamble HS, Armstrong BM, Bhattacharyya S, Hurley R, Baine PT and McNeill DW, "Deposition and characterization of strained SiGe layer as an etch stop layer in ultrathin SOI integration", 210th Electrochemical Society Meeting, Symposium on SiGe: and Germanium Materials, Processing, and Devices Cancun, Mexico, Oct 2006.

26. Wadsworth H, Bhattacharya S, Ruddell FH, McNeill DW, Mitchell SJN, Armstrong BM and Gamble HS, "Low temperature surface nitridation processes for dielectric-Ge interfaces", 210th Electrochemical Society Meeting, Symposium on SiGe: and Germanium Materials, Processing and Devices,  Cancun Mexico, Oct/Nov 2006, v 3, issue 7,

27. Wadsworth HJ, Bhattacharya S, McNeill DW, Ruddell FH, Armstrong BM, Gamble HS and Denvir D, "Germanium MOS capacitors with hafnium dioxide and silicon dioxide dielectrics", E-MRS Spring Meeting 2006 Symposium T (Germanium based semiconductors...from materials to devices), Nice 2006.

28. Wadsworth H, Bhattacharya S, McNeill DW, Ruddell F, Armstrong BM and Gamble HS, "Buried dielectrics for GeOI", Second Workshop on the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, EUROSOI 2006, Grenoble France, 8-10 March, 2006.