Introduction

Research Activities

Nanotechnology

System On Chip

Microelectromechanical Systems (MEMS)

Integrated Circuits and Electronic Devices

Silicon On Insulator (SOI)

Metallisation

Materials and Technology

Microelectronic Device Simulations

Research Opportunities

Research Contacts

Laboratory & Facilities

NISRC Members Only

SiGe Simulation

(by Prof. Alastair Armstrong)

SiGe heteojunction bipolar transistors have been modelled. Shown below is the simulated DC characteristics illustrating typical Gummel plot of a SiGe HBT.

Unity gain cut-off frequency, f_T and maximum oscillation frequency, f_max have been calculated from AC analysis performed at each bias point.

Device simulation allows the designer to directly analyze the effects of his design on all relevant parameters in the device.  Here the potential drop from parasitic collector resistance is shown when the device is operating at high current.

References

1. Armstrong, G.A. and French, W.D.,"A model for the dependence of maximum oscillation frequency on collector to substrate capacitance in bipolar transistors ", Solid State Electronics, 38, 1995, pp.1505-1510.

2. Maiti C.K., Armstrong G.A. "Applications of Silicon-Germanium Heterostructure Devices", IOP Publishing , Bristol, 2001.  ISBN: 0750307234.

3. Maiti C.K. and Armstrong G.A. ,"Effect of Ge profile on the dc current gain of silicon germanium HBTs at low temperature", Proc CODEC 1998, Calcutta, pp. 264-267.